产品介绍

　耐斯迪解密中心彻底突破STM系列IC解密技术，可提取ST系列STM32F107RC芯片内部程序提取技术服务。联系电话：13725570002 0755-83372026   更多芯片解密咨询http://www.yitaopai.cn
STM32F107RC特性如下：
· Core: 32 ARM Cortex ™ - M3 CPU
　　- 72 MHz maximum frequency, 0 wait state memory access 1.25 DMIPS / MHz (Dhrystone2.1) performance
　　- single-cycle multiply and hardware divide
　　* Memory
　　- 256KB program FLASH
　　- 64KB SRAM General
　　· Clock, reset and power management
　　- 2.0 to 3.6V and I / O ports
　　- POR, PDR, and programmable voltage detector (PVD)
　　- 3 to 25 MHz crystal oscillator
　　- Internal factory calibrated 8 MHz RC
　　- 40 kHz with a calibrated internal RC
　　- 32 kHz oscillator for RTC calibration
　　Low power consumption
　　- sleep, shutdown and standby modes
　　- VBAT supply for RTC and backup registers
　　· 2 × 12位, 1μsA / D converter (16 channels)
　　- Conversion range: 0 to 3.6 V
　　- Sample and Hold
　　- temperature sensor
　　- in the staggered mode up to 2 MSPS
　　· 2 × 12 bit D / A converter
　　· DMA: 12-channel DMA controller
　　- support peripherals: timers, ADC, DAC, I2Ss, SPIS, I2Cs and USART
　　· Debug mode
　　- Serial Wire Debug (SWD) and JTAG interface
　　- CortexTM - M3 Embedded Trace Macrocell
　　· 80 Fast I / O ports
　　- 51 I / O ports, ownership Figure 16 external interrupt vectors and almost all 5V tolerant
　　· CRC calculation unit, 96-bit unique ID
　　· Lead up to 10 timers re-mapping function
　　- up to four 16-bit timers, each up to 4 IC / OC / PWM or pulse counter and quadrature (incremental) encoder input
　　- 1 × 16 registration motor control PWM timer dead-time generation and emergency Stop
　　- 2 watchdog timers (Independent and Window)
　　- system timer: 24-bit down counter
　　- 2 × 16-bit basic timer-driven DAC
　　· up to 14 and communication interface and pinout remapping function
　　- up to 2 × I2C interface device (SMBus / PMBus)
　　- up to 5 USART (ISO 7816 Interface, LIN, IrDA ability, modem control)
　　- up to 3 SPI interface (18 Mbit / s), 2个complex I2S interface used by the PLL plans to provide advanced audio level of accuracy
　　- 2 × CAN interfaces (2.0B active with 512 bytes of dedicated SRAM)
- USB 2.0 full speed device / host / OTG controller, on-chip PHY, support HNP / SRP / ID and 1.25 K bytes of dedicated SRAM
- Package: LQFP64 package

深圳耐斯迪反向研究中心：http://www.acoaj.cn (PCB抄板)
http://www.nsd-pcb.com {电路板抄板中心}  http://www.zhcjsc.com.cn