详细说明:
The 74LVC161284 contains eight high speed non inverting bidirectional buffers and eleven control/status non-inverting buffers with open drain outputs fabricated in silicon gate C2MOS technology. It’s intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port Mode (ECP). The HD (Active HIGH) input pin enables the Cable port to switch from Open Drain to a high drive totem pole output, capable of sourcing 14mA on all thirteen buffer and 84mA on PERI LOGIC OUTPUT buffer. The DIR input determines the direction of data flow on the bidirectional buffers. DIR (Active HIGH) enables data flow from A port to B port. DIR (Active LOW) enables data flow from B port to A port. It is available in the commercial temperature range
订购型号 | 产品状态 | 美金价格 | 数量 | 封装 | 包装形式 | 温度范围 | 材料声明 |
74LVC161284MTR | Active | SO-48 | Tape And Reel | 74LVC161284MTR | |||
74LVC161284TTR | Active | TSSOP 48 | Tape And Reel | 74LVC161284TTR |
描述 | 版本 | 大小 |
74LVC161284 : DS3319: Low voltage high speed IEEE1284 transceiver | 1 | 218KB |
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