详细说明：

74LCX138 Low voltage CMOS 3 to 8 line decoder (Inverter) with 5V tolerant inputs

The 74LCX138 is a low voltage CMOS 3 to 8 line decoder (inverting) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs.

If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high.

Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems.

It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

技术特性

• 5V tolerant inputs
• High speed:
  • tPD = 6.7ns (Max) at VCC = 3V
• Power down protection on inputs and outputs
• Symmetrical output impedance:
  • |IOH| = IOL = 24mA (Min) at VCC= 3V
• PCI bus levels guaranteed at 24mA
• Balanced propagation delays:
  • tPLH tPHL
• Operating voltage range:
  • VCC(Opr) = 2.0V to 3.6V
• Pin and function compatible with 74 series 138
• Latch-up performance exceeds 500mA (JESD 17)
• ESD performance:
  • HBM > 2000V
  • (MIL STD 883 method 3015); MM > 200V

74LCX138 订购信息

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