招聘职位: | Senior Design Engineer -India |
学历要求: | - |
性别要求: | all |
招聘人数: | 10 |
工作地点: | - |
工作时间: | 4 |
工资范围 | 0 |
职位介绍: | Brief: To design & develop dsPIC products and modules utilizing analog/custom design techniques. Minimum Requirements: BS/BE in Electronics required. MS/ME preferred. 4 - 7 years experience in design of mixed-signal microelectronics. Experience in dealing with the planning and improvement of power routing, sensitive signal routing, latch-up, guard rings, and the placement and orientation of analog blocks in a chip design. Familiarity with Cadence/Opus, HSPICE, HSIM, Linux. Recommend: Working knowledge of Verilog RTL. Familiarity and experience with a Verilog simulation environment. Lab debug experience. Essential Function: - Perform Design Analysis and interface with the Architecture and CAD teams - Develop behavioral and timing models for analog/custom functional blocks. - Perform debug and validation of silicon and interact with Test, Product and Technology groups - Interact with CAD supoport and CAD development teams and contribute to improve Design Methodology Special Requirements: Some travel. Must possess good communicaiton skills. |
接收简历邮箱: | resumes@microchip.com |